1. Field of the Invention
The present invention relates to a method of forming trenches and a via, and more particularly, to forming trenches and a via without distortion on their sidewalls.
2. Description of the Prior Art
In semiconductor manufacturing, a damascene process, which patterns inlaid metal in preformed grooves, is a preferred method of fabricating interconnections for integrated circuits. Damascene wiring interconnects are formed by depositing a dielectric layer on a planar surface, patterning the dielectric layer using photolithography, then filling the recesses with conductive metal.
Due to an increased demand for highly integrated semiconductor memory devices, techniques for integrating more interconnections onto a small area have become strongly relied upon. The integration involves downscaling the devices to be formed on a semiconductor substrate. The downscaling has a limit based on the wavelength of a light source used in a photolithography process, which determines the dimensions of a device. This wavelength is reaching technical limitations.
To overcome this drawback, a method of forming interconnection patterns which are smaller than the conventional patterns is needed.